diff options
| author | Thomas Albers Raviola <thomas@thomaslabs.org> | 2024-01-19 18:52:14 +0100 |
|---|---|---|
| committer | Thomas Albers Raviola <thomas@thomaslabs.org> | 2024-01-19 18:52:14 +0100 |
| commit | dcbb611c31cabb80cbc7f35759cc9c269bb769b8 (patch) | |
| tree | f9344dd308013c2c246a957d4c59f3c46d7b07cf /zbootloader.c | |
| parent | 3c1c8415713f80cd0919f7bd5244d292f1c3cfe1 (diff) | |
Replace use of internal WIN_N registers by new MMU design
Diffstat (limited to 'zbootloader.c')
| -rw-r--r-- | zbootloader.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/zbootloader.c b/zbootloader.c index df168df..f1e931d 100644 --- a/zbootloader.c +++ b/zbootloader.c @@ -332,16 +332,19 @@ loop(void) int main(void) { + // Reset DMA + dma_ctrl = 0xC3; + // Init CTC // 16 prescaler, timer mode ctc_channel_1 = (CTC_CLK_TRG_BIT | CTC_TIME_CONST_BIT | CTC_RST_BIT | CTC_CTRL_OR_VECTOR_BIT); - ctc_channel_1 = (CPU_FREQ / 16 / 9600); + ctc_channel_1 = (CPU_FREQ / 16 / 9600); // 115200 // 200Hz clock ctc_channel_3 = (CTC_INT_BIT | CTC_PRESCALER_BIT | CTC_CLK_TRG_BIT | CTC_TIME_CONST_BIT | CTC_RST_BIT | CTC_CTRL_OR_VECTOR_BIT); - ctc_channel_3 = (CPU_FREQ / 256 / 36); + ctc_channel_3 = (CPU_FREQ / 256 / 144); ctc_channel_0 = ISR_OFFSET(ctc3_isr_ptr) | (3 << 1); // Init SIO |