#ifndef ZETA_H
#define ZETA_H

/*
 * zeta hardware definitions
 */

#define CPU_FREQ 1843200 // 1.8432 MHz

#define EXT_CE_0 0x80
#define EXT_CE_1 0x90
#define EXT_CE_2 0xA0
#define EXT_CE_3 0xB0
#define EXT_CE_4 0xC0
#define EXT_CE_5 0xD0
#define EXT_CE_6 0xE0
#define EXT_CE_7 0xF0

// ********************************************************

#define SREG_CTRL                     0x00
#define SREG_EXT_MEM                  0x01
#define SREG_MODEM_CTRL_A             0x02
#define SREG_MODEM_CTRL_B             0x04
#define SREG_MEM_LOCK                 0x08
#define SREG_DMA_RDY_EN               0x10
#define SREG_DMA_RDY_0                0x20
#define SREG_DMA_RDY_1                0x40
#define SREG_DMA_RDY_2                0x80

// ********************************************************

#define WIN_0_CTRL 0x10
#define WIN_1_CTRL 0x11
#define WIN_2_CTRL 0x12
#define WIN_3_CTRL 0x13

#define WIN_0_BASE 0x0000
#define WIN_1_BASE 0x4000
#define WIN_2_BASE 0x8000
#define WIN_3_BASE 0xC000

#define ROM_FIRST_BANK 0b00000000
#define ROM_LAST_BANK  0b00011111
#define RAM_FIRST_BANK 0b00100000
#define RAM_LAST_BANK  0b01111111

// ********************************************************

#define CTC_CHANNEL_0 0x20
#define CTC_CHANNEL_1 0x21
#define CTC_CHANNEL_2 0x22
#define CTC_CHANNEL_3 0x23

#define CTC_CTRL_OR_VECTOR_BIT 0x01
#define CTC_RST_BIT            0x02
#define CTC_TIME_CONST_BIT     0x04
#define CTC_TIME_TRG_BIT       0x08
#define CTC_CLK_TRG_BIT        0x10
#define CTC_PRESCALER_BIT      0x20
#define CTC_MODE_BIT           0x40
#define CTC_INT_BIT            0x80

// ********************************************************

#define SIO_A_DATA 0x30
#define SIO_B_DATA 0x31
#define SIO_A_CTRL 0x32
#define SIO_B_CTRL 0x33

#define SIO_EX_INT_EN             0x01
#define SIO_TX_INT_EN             0x02
#define SIO_STATUS_AFFECTS_VECTOR 0x04
#define SIO_RX_INT_MD0            0x08
#define SIO_RX_INT_MD1            0x10
#define SIO_WAIT_RDY_ON_RX_TX     0x20
#define SIO_WAIT_RDY_FTN          0x40
#define SIO_WAIT_RDY_EN           0x80

// ********************************************************

#define PORT_A_DATA 0x40
#define PORT_B_DATA 0x41
#define PORT_A_CTRL 0x42
#define PORT_B_CTRL 0x43

#define PIO_MODE_0 0b00001111
#define PIO_MODE_1 0b01001111
#define PIO_MODE_2 0b10001111
#define PIO_MODE_3 0b11001111

// ********************************************************

#define DMA_CTRL                       0x50

#define DMA_RST                        0xC3
#define DMA_RST_PORT_A_TIMING          0xC7
#define DMA_RST_PORT_B_TIMING          0xC8
#define DMA_LOAD                       0xCF
#define DMA_CONTINUE                   0xD3
#define DMA_DISABLE_INTERRUPTS         0xAF
#define DMA_ENABLE_INTERRUPTS          0xAB
#define DMA_RST_AND_DISABLE_INTERRUPTS 0xA3
#define DMA_ENABLE_AFTER_RETI          0xB7
#define DMA_READ_STATUS_BYTE           0xBF
#define DMA_REINITILIAZE_STATUS_BYTE   0x8B
#define DMA_INITIALIZE_READ_SEQUENCE   0xA7
#define DMA_FORCE_READY                0xB3
#define DMA_ENABLE                     0x87
#define DMA_DISABLE                    0x83
#define DMA_READ_MASK_FOLLOWS          0xBB

// ********************************************************

#define RTC_SECONDS        0x60
#define RTC_MINUTES        0x61
#define RTC_HOURS          0x62
#define RTC_DAY            0x63
#define RTC_DATE           0x64
#define RTC_MONTH          0x65
#define RTC_YEAR           0x66
#define RTC_CENTURY        0x67
#define RTC_ALARM_SECONDS  0x68
#define RTC_ALARM_MINUTES  0x69
#define RTC_ALARM_HOURS    0x6A
#define RTC_ALARM_DAY_DATE 0x6B
#define RTC_WATCHDOG_A     0x6C
#define RTC_WATCHDOG_B     0x6D
#define RTC_CONTROL_A      0x6E
#define RTC_CONTROL_B      0x6F
#define RTC_RAM_ADDRESS    0x70
#define RTC_RAM_DATA       0x73

//
#ifndef ASSEMBLY

__sfr __at CTC_CHANNEL_0 ctc_channel_0;
__sfr __at CTC_CHANNEL_1 ctc_channel_1;
__sfr __at CTC_CHANNEL_2 ctc_channel_2;
__sfr __at CTC_CHANNEL_3 ctc_channel_3;

__sfr __at SIO_A_DATA sio_a_data;
__sfr __at SIO_B_DATA sio_b_data;
__sfr __at SIO_A_CTRL sio_a_ctrl;
__sfr __at SIO_B_CTRL sio_b_ctrl;

#define IM(__mode) __asm__("im " #__mode)
#define EI __asm__("ei")
#define DI __asm__("di")

#endif // ASSEMBLY

#endif /* ZETA_H */