#include .module crt0 .globl _main .area _HEADER (ABS) ;; Reset vector .org 0x0000 ld sp, #0x00 xor a ld i, a jp init ;; ISR table .org 0x0010 _ctc0_isr_ptr: .dw #0 _ctc1_isr_ptr: .dw #0 _ctc2_isr_ptr: .dw #0 .globl _ctc3_isr_ptr _ctc3_isr_ptr: .dw #_ctc3_isr .globl _rx_isr_ptr _rx_isr_ptr: .dw #_rx_isr ;; Init code init: ;; Configure banking ld a, #0x81 out (MMU_A), A ld a, #0x82 out (MMU_B), A ;; Disable PIO interrupts ld a, #0x07 out (PORT_A_CTRL), a ld a, #0x07 out (PORT_B_CTRL), a call gsinit call _main 1$: halt jr 1$ ;; Ordering of segments for the linker. .area _HOME .area _CODE .area _INITIALIZER .area _GSINIT .area _GSFINAL .area _DATA .area _INITIALIZED .area _BSEG .area _BSS .area _HEAP .area _CODE .area _GSINIT gsinit: ;; Default-initialized global variables. ld bc, #l__DATA ld a, b or a, c jr Z, zeroed_data ld hl, #s__DATA ld (hl), #0x00 dec bc ld a, b or a, c jr Z, zeroed_data ld e, l ld d, h inc de ldir zeroed_data: ;; Explicitly initialized global variables. ld bc, #l__INITIALIZER ld a, b or a, c jr Z, gsinit_next ld de, #s__INITIALIZED ld hl, #s__INITIALIZER ldir gsinit_next: .area _GSFINAL ret